VppSim provides a software framework that supports Verilog and C++ co-simulation
within the Cadence environment. There are three main components to this framework:
1) CppSim: Simulation of C++ modules -- same as in Windows version but uses
Cadence for its schematic capture rather than Sue2.
2) VppSim: Co-simulation of C++ and Verilog modules
3) AMS: Co-simulation of C++, Verilog and Spectre models
VppSim therefore provides a top-down design methodology in which designers start
at the highest level with CppSim modules, and then gradually build more granular
models using Verilog and Spectre. Designers can also benefit from the ability to
convert CppSim systems created within Cadence into Matlab mex functions and
Simulink S-functions.
Unlike the Windows version of CppSim, the VppSim framework is still in Beta form
and will only be supported in the future as a commercial package. For those
interested in trying out this package, a distribution file and manuals are provided
below. Please note that the key binary executable in this package will expire January
2011. After that time, users must contact support@cppsim.com to arrange for
receiving an updated binary executable.
For instructions on installation, please read the VppSim Primer document below.
Package download: vppsim_dist.tar.gz (6.7 MB)
(Optional Example for AMS - See VppSim Primer): amsd.tar.gz (43 MB)
Manuals:
1) VppSim Primer: vppsim_primer.pdf
2) CppSim Reference Manual: cppsimdoc.pdf
Tutorials:
1) Behavioral Simulation of a High-Speed Link Transceiver Using VppSim
data_link_transceiver_vppsim_tutorial.pdf
2) 6.973 Tutorial on Verilog/C++ Co-simulation
6.973_tutorial_on_Verilog_Cpp_co-simulation.pdf
within the Cadence environment. There are three main components to this framework:
1) CppSim: Simulation of C++ modules -- same as in Windows version but uses
Cadence for its schematic capture rather than Sue2.
2) VppSim: Co-simulation of C++ and Verilog modules
3) AMS: Co-simulation of C++, Verilog and Spectre models
VppSim therefore provides a top-down design methodology in which designers start
at the highest level with CppSim modules, and then gradually build more granular
models using Verilog and Spectre. Designers can also benefit from the ability to
convert CppSim systems created within Cadence into Matlab mex functions and
Simulink S-functions.
Unlike the Windows version of CppSim, the VppSim framework is still in Beta form
and will only be supported in the future as a commercial package. For those
interested in trying out this package, a distribution file and manuals are provided
below. Please note that the key binary executable in this package will expire January
2011. After that time, users must contact support@cppsim.com to arrange for
receiving an updated binary executable.
For instructions on installation, please read the VppSim Primer document below.
Package download: vppsim_dist.tar.gz (6.7 MB)
(Optional Example for AMS - See VppSim Primer): amsd.tar.gz (43 MB)
Manuals:
1) VppSim Primer: vppsim_primer.pdf
2) CppSim Reference Manual: cppsimdoc.pdf
Tutorials:
1) Behavioral Simulation of a High-Speed Link Transceiver Using VppSim
data_link_transceiver_vppsim_tutorial.pdf
2) 6.973 Tutorial on Verilog/C++ Co-simulation
6.973_tutorial_on_Verilog_Cpp_co-simulation.pdf
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