A Beta version of CppSim/VppSim for the Cadence® environment is provided below, and includes the option of incorporating CppSim modules within the AMS Designer simulator from Cadence®. No warranty or support is provided with this software. For instructions on installation, please read the CppSim/VppSim for Cadence® Primer document below. Note that these tutorials have not yet been updated from Version 4 of CppSim, so there will be some minor differences between the documentation and what is displayed in the software.
Hspice Toolbox for Matlab® and Octave is a collection of Matlab®/Octave routines that allow the user to manipulate and view signals generated by Hspice, Ngspice, and CppSim simulations. Note that this package is already included in the CppSim framework, but can be downloaded individually below.
The CppSim and Ngspice Data Modules for Python, currently in Beta form, provide an easy approach to read in CppSim or Ngspice simulation data, respectively, into Numpy arrays for post-processing tasks using Python. These modules are already included within the standard CppSim distribution, but are also included here for convenience.
The Hspice Conversion (hspc) program provides an easy method of modifying Hspice or Ngspice netlists to support digital input signals, automatic generation of parameter combinations for corner sims, and calculation of source/drain perimeter and area values. Details of its functions are listed in the introduction section of the manual.
These Matlab® scripts implement a simple numerical procedure to allow straightforward design of high speed, resistor loaded,differential amplifiers in modern CMOS processes whose device characteristics dramatically depart from traditional square law characterisitics. The analytical form of the procedure is explained in the paper listed below. The scripts allow for quick design of high-speed amplifiers for a set of gain, output swing and either bandwidth or power dissipation design specifications and provide intuition about the implication of varying gain-bandwidth product for such amplifiers. The scripts are also applicable to the design of high speed, source-coupled logic (SCL) gates and latches.
Details of this approach are described in: